Publicacions (302) Publicacions en què ha participat algun/a investigador/a

2024

  1. AXI4MLIR: User-Driven Automatic Host Code Generation for Custom AXI-Based Accelerators

    CGO 2024 - Proceedings of the 2024 IEEE/ACM International Symposium on Code Generation and Optimization

  2. Alternate Path μ-op Cache Prefetching

    Proceedings - International Symposium on Computer Architecture

  3. Code Detection for Hardware Acceleration Using Large Language Models

    IEEE Access, Vol. 12, pp. 35271-35281

  4. Effective Context-Sensitive Memory Dependence Prediction

    Proceedings - International Symposium on High-Performance Computer Architecture

  5. Expanding the deep-learning model to diagnosis LVNC: limitations and trade-offs

    Computer Methods in Biomechanics and Biomedical Engineering: Imaging and Visualization, Vol. 12, Núm. 1

  6. NeuraChip: Accelerating GNN Computations with a Hash-based Decoupled Spatial Accelerator

    Proceedings - International Symposium on Computer Architecture

  7. On the interactions between ILP and TLP with hardware transactional memory

    Microprocessors and Microsystems, Vol. 104

  8. POAS: a framework for exploiting accelerator level parallelism in heterogeneous environments

    Journal of Supercomputing, Vol. 80, Núm. 10, pp. 14666-14693

  9. Plinio el Viejo. Historia Natural. Escritos sobre artes. David García López.

    Imafronte, Núm. 31, pp. 254-255

  10. Scalability Limitations of Processing-in-Memory using Real System Evaluations

    Performance Evaluation Review, Vol. 52, Núm. 1, pp. 63-64

  11. Scalability Limitations of Processing-in-Memory using Real System Evaluations

    SIGMETRICS/PERFORMANCE 2024 - Abstracts of the 2024 ACM SIGMETRICS/IFIP PERFORMANCE Joint International Conference on Measurement and Modeling of Computer Systems

  12. Scalability limitations of processing-in-memory using real system evaluations

    Proceedings of the ACM on Measurement and Analysis of Computing Systems, Vol. 8, Núm. 1

  13. Uso de la IA para proporcionar retroalimentación al docente a través del análisis de las grabaciones de clases

    Actas de las Jornadas sobre la Enseñanza Universitaria de la Informática (JENUI), Núm. 9, pp. 241-249

  14. Wrong-Path-Aware Entangling Instruction Prefetcher

    IEEE Transactions on Computers, Vol. 73, Núm. 2, pp. 548-559

2023

  1. Accelerating Finite Field Arithmetic for Homomorphic Encryption on GPUs

    IEEE Micro, Vol. 43, Núm. 5, pp. 55-63

  2. Architectural Support for Optimizing Huge Page Selection Within the OS

    Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2023

  3. Boustrophedonic Frames: Quasi-Optimal L2 Caching for Textures in GPUs

    Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT

  4. CELLO: Compiler-Assisted Efficient Load-Load Ordering in Data-Race-Free Regions

    Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT

  5. Fine-grain data classification to filter token coherence traffic

    Journal of Parallel and Distributed Computing, Vol. 171, pp. 40-53

  6. Flexagon: A Multi-dataflow Sparse-Sparse Matrix Multiplication Accelerator for Efficient DNN Processing

    International Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS