Jose Luis
Abellan Miguel
Investigador "Ramon y Cajal"
Boston University
Boston, Estados UnidosPublicaciones en colaboración con investigadores/as de Boston University (25)
2024
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NeuraChip: Accelerating GNN Computations with a Hash-based Decoupled Spatial Accelerator
Proceedings - International Symposium on Computer Architecture
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Scalability Limitations of Processing-in-Memory using Real System Evaluations
Performance Evaluation Review, Vol. 52, Núm. 1, pp. 63-64
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Scalability Limitations of Processing-in-Memory using Real System Evaluations
SIGMETRICS/PERFORMANCE 2024 - Abstracts of the 2024 ACM SIGMETRICS/IFIP PERFORMANCE Joint International Conference on Measurement and Modeling of Computer Systems
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Scalability limitations of processing-in-memory using real system evaluations
Proceedings of the ACM on Measurement and Analysis of Computing Systems, Vol. 8, Núm. 1
2023
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Accelerating Finite Field Arithmetic for Homomorphic Encryption on GPUs
IEEE Micro, Vol. 43, Núm. 5, pp. 55-63
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GME: GPU-based Microarchitectural Extensions to Accelerate Homomorphic Encryption
Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2023
2022
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Accelerating Polynomial Multiplication for Homomorphic Encryption on GPUs
Proceedings - 2022 IEEE International Symposium on Secure and Private Execution Environment Design, SEED 2022
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NaviSim: A Highly Accurate GPU Simulator for AMD RDNA GPUs
Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT
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Puppeteer: A Random Forest Based Manager for Hardware Prefetchers Across the Memory Hierarchy
ACM Transactions on Architecture and Code Optimization, Vol. 20, Núm. 1
2021
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GNNMark: A Benchmark Suite to Characterize Graph Neural Network Training on GPUS
Proceedings - 2021 IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2021
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TAP-2.5D: A Thermally-Aware Chiplet Placement Methodology for 2.5D Systems
Proceedings -Design, Automation and Test in Europe, DATE
2020
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Griffin: Hardware-software support for efficient page migration in multi-GPU systems
Proceedings - 2020 IEEE International Symposium on High Performance Computer Architecture, HPCA 2020
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Valkyrie: Leveraging inter-TLB locality to enhance GPU performance
Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT
2019
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MGPUSim: Enabling multi-GPU performance modeling and optimization
Proceedings - International Symposium on Computer Architecture
2018
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Profiling DNN Workloads on a Volta-based DGX-1 System
2018 IEEE International Symposium on Workload Characterization, IISWC 2018
2017
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Adaptive Tuning of Photonic Devices in a Photonic NoC Through Dynamic Workload Allocation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 36, Núm. 5, pp. 801-814
2016
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Electro-photonic NoC designs for Kilocore systems
ACM Journal on Emerging Technologies in Computing Systems, Vol. 13, Núm. 2
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UMH: A hardware-based unified memory hierarchy for systems with multiple discrete GPUs
ACM Transactions on Architecture and Code Optimization, Vol. 13, Núm. 4
2015
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Asymmetric NoC architectures for GPU systems
Proceedings - 2015 9th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2015
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Efficient hardware-supported synchronization mechanisms for manycores
Handbook on Data Centers (Springer New York), pp. 753-803