Alberto
Ros Bardisa
Catedraticos de Universidad
Thesis
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Efficient and Scalable Cache Coherence for Many-Core Chip Multiprocessors 2009
Universidad de Murcia
Supervised Theses (5)
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Advancements towards non-speculative concurrent execution of critical sections 2025
Universidad de Murcia
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Unfencing atomic operations: optimizations and applications 2024
Universidad de Murcia
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Microarchitectural Optimizations for an Efficient Utilization of Processor Resources 2024
Universidad de Murcia
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Design of Efficient TLB-based Data Classification Mechanisms in Chip Multiprocessors 2017
Universitat Politècnica de València
Esteve García, Albert
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Advances Towards Data-Race-Free Cache Coherence Through Data Classification 2017
Uppsala Universitet
Davari, Mahdad
Theses Committees (3)
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Committee Member
Exploiting natural on-chip redundancy for energy efficient memory and computing 2016Universidad de Zaragoza
Ferrerón Labari, Alexandra
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Committee Member
Transparent management of scratchpad memories in shared memory programming models 2015Universitat Politècnica de Catalunya (UPC)
Álvarez Martí, Lluc
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Committee Member
Sincronización y comunicación eficientes en arquitecturas many-core CMP = Efficient synchronization and communication in many-core chip multiprocessors 2012Universidad de Murcia