Publications

Alberto Ros Bardisa publications View referenced research data.

138 results

2026

  1. Compiler-Assisted Instruction Fusion

    CGO 2026 - Proceedings of the 2026 IEEE/ACM International Symposium on Code Generation and Optimization

  2. Correct Wrong Path Simulation

    IEEE International Symposium on Performance Analysis of Systems and Software/ISPASS

  3. Enabling Automatic Compiler-Driven Vectorization of Transformers

    CGO 2026 - Proceedings of the 2026 IEEE/ACM International Symposium on Code Generation and Optimization

  4. ICARUS: Criticality and Reuse based Instruction Caching for Datacenter Applications

    PROCEEDINGS OF THE 31ST ACM INTERNATIONAL CONFERENCE ON ARCHITECTURAL SUPPORT FOR PROGRAMMING LANGUAGES AND OPERATING SYSTEMS, VOL 2, ASPLOS 2026

  5. Optimize edge AI processing through innovative compilation techniques

    Proceedings -Design, Automation and Test in Europe, DATE

  6. Untangling the Low Accuracy of the Entangling Instruction Prefetcher

    IEEE Computer Architecture Letters, Vol. 25, Núm. 1, pp. 130-133

2025

  1. A Complexity-Effective Local Delta Prefetcher

    IEEE Transactions on Computers, Vol. 74, Núm. 5, pp. 1482-1494

  2. A Complexity-Effective Local Delta Prefetcher

    IEEE Transactions on Computers

  3. Bounding Speculative Execution of Atomic Regions to a Single Retry

    International Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS

  4. Correct Wrong Path

    IEEE Computer Architecture Letters, Vol. 24, Núm. 2, pp. 221-224

  5. Mascot: Predicting Memory Dependencies and Opportunities for Speculative Memory Bypassing

    Proceedings - International Symposium on High-Performance Computer Architecture

  6. No Rush in Executing Atomic Instructions

    Proceedings - International Symposium on High-Performance Computer Architecture

  7. WoperTM: Got Nacks? Use Them!

    IEEE Computer Architecture Letters, Vol. 24, Núm. 1, pp. 157-160

2024

  1. A First Exploration of Fine-Grain Coherence for Integrity Metadata

    Proceedings - 2024 International Symposium on Secure and Private Execution Environment Design, SEED 2024

  2. Alternate Path μ-op Cache Prefetching

    Proceedings - International Symposium on Computer Architecture

  3. Chaining Transactions for Effective Concurrency Management in Hardware Transactional Memory

    Proceedings of the Annual International Symposium on Microarchitecture, MICRO

  4. Effective Context-Sensitive Memory Dependence Prediction

    Proceedings - International Symposium on High-Performance Computer Architecture

  5. Enhanced System-Level Coherence for Heterogeneous Unified Memory Architectures

    Proceedings - 2024 IEEE International Symposium on Workload Characterization, IISWC 2024

  6. Hardware Cache Locking for All Memory Updates

    Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

  7. On the interactions between ILP and TLP with hardware transactional memory

    Microprocessors and Microsystems, Vol. 104