Publications (123) Alberto Ros Bardisa publications View referenced research data.

2024

  1. A First Exploration of Fine-Grain Coherence for Integrity Metadata

    Proceedings - 2024 International Symposium on Secure and Private Execution Environment Design, SEED 2024

  2. Alternate Path μ-op Cache Prefetching

    Proceedings - International Symposium on Computer Architecture

  3. Chaining Transactions for Effective Concurrency Management in Hardware Transactional Memory

    Proceedings of the Annual International Symposium on Microarchitecture, MICRO

  4. Effective Context-Sensitive Memory Dependence Prediction

    Proceedings - International Symposium on High-Performance Computer Architecture

  5. Enhanced System-Level Coherence for Heterogeneous Unified Memory Architectures

    Proceedings - 2024 IEEE International Symposium on Workload Characterization, IISWC 2024

  6. On the interactions between ILP and TLP with hardware transactional memory

    Microprocessors and Microsystems, Vol. 104

  7. Secure Prefetching for Secure Cache Systems

    Proceedings of the Annual International Symposium on Microarchitecture, MICRO

  8. Temporarily Unauthorized Stores: Write First, Ask for Permission Later

    Proceedings of the Annual International Symposium on Microarchitecture, MICRO

  9. Wrong-Path-Aware Entangling Instruction Prefetcher

    IEEE Transactions on Computers, Vol. 73, Núm. 2, pp. 548-559

2023

  1. CELLO: Compiler-Assisted Efficient Load-Load Ordering in Data-Race-Free Regions

    Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT

  2. Fine-grain data classification to filter token coherence traffic

    Journal of Parallel and Distributed Computing, Vol. 171, pp. 40-53

  3. MBPlib: Modular Branch Prediction Library

    Proceedings - 2023 IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2023

  4. Rebasing Microarchitectural Research with Industry Traces

    Proceedings - 2023 IEEE International Symposium on Workload Characterization, IISWC 2023

  5. Speculative inter-thread store-to-load forwarding in SMT architectures

    Journal of Parallel and Distributed Computing, Vol. 173, pp. 94-106

2022

  1. Analysing software prefetching opportunities in hardware transactional memory

    Journal of Supercomputing, Vol. 78, Núm. 1, pp. 919-944

  2. Analysis of the Interactions between ILP and TLP with Hardware Transactional Memory

    Proceedings - 30th Euromicro International Conference on Parallel, Distributed and Network-Based Processing, PDP 2022

  3. Berti: an Accurate Local-Delta Data Prefetcher

    Proceedings of the Annual International Symposium on Microarchitecture, MICRO

  4. Compiler-Assisted Compaction/Restoration of SIMD Instructions

    IEEE Transactions on Parallel and Distributed Systems, Vol. 33, Núm. 4, pp. 779-791

  5. Composite Instruction Prefetching

    Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

  6. DeTraS: Delaying stores for friendly-fire mitigation in hardware transactional memory

    IEEE Transactions on Parallel and Distributed Systems, Vol. 33, Núm. 1, pp. 1-13