Jose Ruben
Titos Gil
Profesor Permanente Laboral
Publicaciones (39) Publicaciones de Jose Ruben Titos Gil
2024
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On the interactions between ILP and TLP with hardware transactional memory
Microprocessors and Microsystems, Vol. 104
2022
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Analysing software prefetching opportunities in hardware transactional memory
Journal of Supercomputing, Vol. 78, Núm. 1, pp. 919-944
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Analysis of the Interactions between ILP and TLP with Hardware Transactional Memory
Proceedings - 30th Euromicro International Conference on Parallel, Distributed and Network-Based Processing, PDP 2022
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DeTraS: Delaying stores for friendly-fire mitigation in hardware transactional memory
IEEE Transactions on Parallel and Distributed Systems, Vol. 33, Núm. 1, pp. 1-13
2021
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Efficient, distributed, and non-speculative multi-address atomic operations
Proceedings of the Annual International Symposium on Microarchitecture, MICRO
2020
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Concurrent Irrevocability in Best-Effort Hardware Transactional Memory
IEEE Transactions on Parallel and Distributed Systems, Vol. 31, Núm. 6, pp. 1301-1315
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PfTouch: Concurrent page-fault handling for Intel restricted transactional memory
Journal of Parallel and Distributed Computing, Vol. 145, pp. 111-123
2019
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Proyecto Tetris: aprendizaje de la programación en ensamblador por piezas
Actas de las Jornadas sobre la Enseñanza Universitaria de la Informática (JENUI), Núm. 4
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Way Combination for an Adaptive and Scalable Coherence Directory
IEEE Transactions on Parallel and Distributed Systems, Vol. 30, Núm. 11, pp. 2608-2623
2017
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Way-combining directory: An adaptive and scalable low-cost coherence directory
Proceedings of the International Conference on Supercomputing
2016
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Architectural support for efficient message passing on shared memory multi-cores
Journal of Parallel and Distributed Computing, Vol. 95, pp. 92-106
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Energy minimization at all layers of the data center: The ParaDIME Project
PROCEEDINGS OF THE 2016 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE)
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Energy minimization at all layers of the data center: The ParaDIME project
Proceedings of the 2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016
2015
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DiMP: Architectural support for direct message passing on shared memory multi-cores
Proceedings of the International Conference on Parallel Processing
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Enhancing garbage collection synchronization using explicit bit barriers
Proceedings of the International Conference on Parallel Processing
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Hardware approaches to transactional memory in chip multiprocessors
Handbook on Data Centers (Springer New York), pp. 805-835
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ParaDIME: Parallel Distributed Infrastructure for Minimization of Energy for data centers
Microprocessors and Microsystems, Vol. 39, Núm. 8, pp. 1174-1189
2014
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Performance and energy analysis of the restricted transactional memory implementation on haswell
Proceedings of the International Parallel and Distributed Processing Symposium, IPDPS
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Selective dynamic serialization for reducing energy consumption in hardware transactional memory systems
Journal of Supercomputing, Vol. 68, Núm. 2, pp. 914-934
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ZEBRA: Data-centric contention management in hardware transactional memory
IEEE Transactions on Parallel and Distributed Systems, Vol. 25, Núm. 5, pp. 1359-1369