Arquitectura y Computación paralela
University of California, Irvine
Irvine, Estados UnidosPublicacións en colaboración con investigadores/as de University of California, Irvine (3)
2008
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Optimizing CAM-based instruction cache designs for low-power embedded systems
Journal of Systems Architecture, Vol. 54, Núm. 12, pp. 1155-1163
2005
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Energy-effective instruction fetch unit for wide issue processors
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
2004
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Energy-efficient design for highly associative instruction caches in next-generation embedded processors
Proceedings - Design, Automation and Test in Europe Conference and Exhibition