University of California, Irvine-ko ikertzaileekin lankidetzan egindako argitalpenak (4)

2008

  1. Optimizing CAM-based instruction cache designs for low-power embedded systems

    Journal of Systems Architecture, Vol. 54, Núm. 12, pp. 1155-1163

2005

  1. Energy-effective instruction fetch unit for wide issue processors

    Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

2004

  1. Energy-efficient design for highly associative instruction caches in next-generation embedded processors

    Proceedings - Design, Automation and Test in Europe Conference and Exhibition

  2. Energy-efficient design for highly associative instruction caches in next-generation embedded processors

    DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, VOLS 1 AND 2, PROCEEDINGS