Publications dans lesquelles il/elle collabore avec Mateo Valero Cortés (9)

2020

  1. Efficiency analysis of modern vector architectures: vector ALU sizes, core counts and clock frequencies

    Journal of Supercomputing, Vol. 76, Núm. 3, pp. 1960-1979

  2. Improving predication efficiency through compaction/restoration of SIMD instructions

    Proceedings - 2020 IEEE International Symposium on High Performance Computer Architecture, HPCA 2020

  3. Semi-automatic validation of cycle-accurate simulation infrastructures: The case for gem5-x86

    Future Generation Computer Systems, Vol. 112, pp. 832-847

  4. Using Arm’s scalable vector extension on stencil codes

    Journal of Supercomputing, Vol. 76, Núm. 3, pp. 2039-2062

2019

  1. Poster: An optimized predication execution for simd extensions

    Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT

2018

  1. Performance and energy effects on task-based parallelized applications: User-directed versus manual vectorization

    Journal of Supercomputing, Vol. 74, Núm. 6, pp. 2627-2637

  2. Stencil codes on a vector length agnostic architecture

    Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT

2012

  1. Hardware transactional memory with software-defined conflicts

    Transactions on Architecture and Code Optimization, Vol. 8, Núm. 4

2011

  1. Using a reconfigurable L1 data cache for efficient version management in hardware Transactional Memory

    Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT