Publicaciones en colaboración con investigadores/as de Universitat Politècnica de Catalunya (3)

2015

  1. DiMP: Architectural support for direct message passing on shared memory multi-cores

    Proceedings of the International Conference on Parallel Processing

2013

  1. Techniques to Improve Performance in Requester-Wins Hardware Transactional Memory

    ACM Transactions on Architecture and Code Optimization, Vol. 10, Núm. 4, pp. 1-25

2011

  1. Using a reconfigurable L1 data cache for efficient version management in hardware Transactional Memory

    Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT