Intel Corporation, Systems Research Center, Systems Technology Lab.-ko ikertzaileekin lankidetzan egindako argitalpenak (6)

2015

  1. Adaptive selection of cache indexing bits for removing conflict misses

    IEEE Transactions on Computers, Vol. 64, Núm. 6, pp. 1534-1547

2014

  1. Selective dynamic serialization for reducing energy consumption in hardware transactional memory systems

    Journal of Supercomputing, Vol. 68, Núm. 2, pp. 914-934

2013

  1. Deploying hardware locks to improve performance and energy efficiency of hardware transactional memory

    Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

2012

  1. Dynamic Serialization: Improving energy consumption in eager-eager hardware transactional memory systems

    Proceedings - 20th Euromicro International Conference on Parallel, Distributed and Network-Based Processing, PDP 2012

2007

  1. An efficient implementation of a 3D wavelet transform based encoder on hyper-threading technology

    Parallel Computing, Vol. 33, Núm. 1, pp. 54-72

2002

  1. The use of prediction for accelerating upgrade misses in cc-NUMA multiprocessors

    Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT