Publicaciones en las que colabora con Juan Luis Aragon Alcaraz (7)

2010

  1. Energy-efficient hardware prefetching for CMPs using heterogeneous interconnects

    Proceedings of the 18th Euromicro Conference on Parallel, Distributed and Network-Based Processing, PDP 2010

  2. Exploiting address compression and heterogeneous interconnects for efficient message management in tiled CMPs

    Journal of Systems Architecture, Vol. 56, Núm. 9, pp. 429-441

  3. Heterogeneous interconnects for renergy-efficient message management in CMPs

    IEEE Transactions on Computers, Vol. 59, Núm. 1, pp. 16-28

2008

  1. Address compression and heterogeneous interconnects for energy-efficient high-performance in tiled CMPs

    Proceedings of the International Conference on Parallel Processing

  2. An energy consumption characterization of on-chip interconnection networks for tiled CMP architectures

    Journal of Supercomputing, Vol. 45, Núm. 3, pp. 341-364

2007

  1. Efficient message management in tiled CMP architectures using a heterogeneous interconnection network

    Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

  2. Sim-PowerCMP: A detailed simulator for energy consumption analysis in future embedded CMP architectures

    Proceedings - 21st International Conference on Advanced Information Networking and Applications Workshops/Symposia, AINAW'07