Publicacions (314) Publicacions en què ha participat algun/a investigador/a Veure dades d'investigació referenciades.

2023

  1. Improving a Deep Learning Model to Accurately Diagnose LVNC

    Journal of Clinical Medicine, Vol. 12, Núm. 24

  2. Matching Linear Algebra and Tensor Code to Specialized Hardware Accelerators

    CC 2023 - Proceedings of the 32nd ACM SIGPLAN International Conference on Compiler Construction

  3. On the representativeness and stability of a set of EFMs

    Bioinformatics, Vol. 39, Núm. 6

2022

  1. Analysing software prefetching opportunities in hardware transactional memory

    Journal of Supercomputing, Vol. 78, Núm. 1, pp. 919-944

  2. Analysis of the Interactions between ILP and TLP with Hardware Transactional Memory

    Proceedings - 30th Euromicro International Conference on Parallel, Distributed and Network-Based Processing, PDP 2022

  3. Applying Intel's oneAPI to a machine learning case study

    Concurrency and Computation: Practice and Experience, Vol. 34, Núm. 13

  4. DeTraS: Delaying stores for friendly-fire mitigation in hardware transactional memory

    IEEE Transactions on Parallel and Distributed Systems, Vol. 33, Núm. 1, pp. 1-13

  5. HDNN: a cross-platform MLIR dialect for deep neural networks

    Journal of Supercomputing, Vol. 78, Núm. 11, pp. 13814-13830

  6. Left ventricular non-compaction cardiomyopathy automatic diagnosis using a deep learning approach

    Computer Methods and Programs in Biomedicine, Vol. 214

  7. Performance portability in a real world application: PHAST applied to Caffe

    International Journal of High Performance Computing Applications, Vol. 36, Núm. 3, pp. 419-439

  8. Staphylococcus epidermidis RP62A’s Metabolic Network: Validation and Intervention Strategies

    Metabolites, Vol. 12, Núm. 9

2021

  1. ACOTSP-MF: A memory-friendly and highly scalable ACOTSP approach

    Engineering Applications of Artificial Intelligence, Vol. 99

  2. Deploying deep learning approaches to left ventricular non-compaction measurement

    Journal of Supercomputing, Vol. 77, Núm. 9, pp. 10138-10151

2020

  1. Boosting store buffer efficiency with store-prefetch bursts

    Proceedings of the Annual International Symposium on Microarchitecture, MICRO

  2. Boosting the extraction of elementary flux modes in genome-scale metabolic networks using the linear programming approach

    Bioinformatics, Vol. 36, Núm. 14, pp. 4163-4170

  3. Concurrent Irrevocability in Best-Effort Hardware Transactional Memory

    IEEE Transactions on Parallel and Distributed Systems, Vol. 31, Núm. 6, pp. 1301-1315

  4. Efficiency analysis of modern vector architectures: vector ALU sizes, core counts and clock frequencies

    Journal of Supercomputing, Vol. 76, Núm. 3, pp. 1960-1979