Arquitectura y Computación Paralela
Universidad Politécnica de Valencia
Valencia, EspañaPublicaciones en colaboración con investigadores/as de Universidad Politécnica de Valencia (50)
2023
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CELLO: Compiler-Assisted Efficient Load-Load Ordering in Data-Race-Free Regions
Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT
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Data Artifact: Rebasing Microarchitectural Research with Industry Traces
Zenodo
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Data Artifact: Rebasing Microarchitectural Research with Industry Traces
Zenodo
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Improved Converted Traces from Rebasing Microarchitectural Research with Industry Traces
Zenodo
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Improved Converted Traces from Rebasing Microarchitectural Research with Industry Traces
Zenodo
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Rebasing Microarchitectural Research with Industry Traces
Proceedings - 2023 IEEE International Symposium on Workload Characterization, IISWC 2023
2021
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Evaluation of clustering algorithms on hpc platforms
Mathematics, Vol. 9, Núm. 17
2020
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High-throughput fuzzy clustering on heterogeneous architectures
Future Generation Computer Systems, Vol. 106, pp. 401-411
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QN-Docking: An innovative molecular docking methodology based on Q-Networks
Applied Soft Computing Journal, Vol. 96
2019
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Foreword to the Special Issue on Processors, Interconnects, Storage, and Caches for Exascale Systems
Concurrency Computation
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Way Combination for an Adaptive and Scalable Coherence Directory
IEEE Transactions on Parallel and Distributed Systems, Vol. 30, Núm. 11, pp. 2608-2623
2018
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TokenTLB+CUP: A Token-Based Page Classification with Cooperative Usage Prediction
IEEE Transactions on Parallel and Distributed Systems, Vol. 29, Núm. 5, pp. 1188-1201
2017
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TLB-Based Temporality-Aware Classification in CMPs with Multilevel TLBs
IEEE Transactions on Parallel and Distributed Systems, Vol. 28, Núm. 8, pp. 2401-2413
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The Tag Filter Architecture: An energy-efficient cache and directory design
Journal of Parallel and Distributed Computing, Vol. 100, pp. 193-202
2016
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A Directory Cache with Dynamic Private-Shared Partitioning
Proceedings - 23rd IEEE International Conference on High Performance Computing, HiPC 2016
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A Directory Cache with Dynamic Private-Shared Partitioning
PROCEEDINGS OF 2016 IEEE 23RD INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE COMPUTING (HIPC)
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Efficient TLB-Based Detection of Private Pages in Chip Multiprocessors
IEEE Transactions on Parallel and Distributed Systems, Vol. 27, Núm. 3, pp. 748-761
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TokenTLB: A token-based page classification approach
Proceedings of the International Conference on Supercomputing
2015
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PS directory: A scalable multilevel directory cache for CMPs
Journal of Supercomputing, Vol. 71, Núm. 8, pp. 2847-2876
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PS-Cache: an energy-efficient cache design for chip multiprocessors
Journal of Supercomputing, Vol. 71, Núm. 1, pp. 67-86