Publicaciones en colaboración con investigadores/as de Universitat Politècnica de Catalunya (32)

2023

  1. Boustrophedonic Frames: Quasi-Optimal L2 Caching for Textures in GPUs

    Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT

2022

  1. DTM-NUCA: Dynamic Texture Mapping-NUCA for Energy-Efficient Graphics Rendering

    Proceedings - 30th Euromicro International Conference on Parallel, Distributed and Network-Based Processing, PDP 2022

  2. DTexL: Decoupled Raster Pipeline for Texture Locality

    Proceedings of the Annual International Symposium on Microarchitecture, MICRO

  3. Dynamic sampling rate: harnessing frame coherence in graphics applications for energy-efficient GPUs

    Journal of Supercomputing, Vol. 78, Núm. 13, pp. 14940-14964

  4. MEGsim: A Novel Methodology for Efficient Simulation of Graphics Workloads in GPUs

    Proceedings - 2022 IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2022

  5. Omega-Test: A Predictive Early-Z Culling to Improve the Graphics Pipeline Energy-Efficiency

    IEEE Transactions on Visualization and Computer Graphics, Vol. 28, Núm. 12, pp. 4375-4388

  6. TCOR: A Tile Cache with Optimal Replacement

    Proceedings - International Symposium on High-Performance Computer Architecture

  7. Triangle Dropping: An Occluded-geometry Predictor for Energy-efficient Mobile GPUs

    ACM Transactions on Architecture and Code Optimization, Vol. 19, Núm. 3

  8. Understanding the Design-Space of Sparse/Dense Multiphase GNN dataflows on Spatial Accelerators

    Proceedings - 2022 IEEE 36th International Parallel and Distributed Processing Symposium, IPDPS 2022

2021

  1. Fast and Accurate SER Estimation for Large Combinational Blocks in Early Stages of the Design

    IEEE Transactions on Sustainable Computing, Vol. 6, Núm. 3, pp. 427-440

2020

  1. Improving predication efficiency through compaction/restoration of SIMD instructions

    Proceedings - 2020 IEEE International Symposium on High Performance Computer Architecture, HPCA 2020

  2. Using Arm’s scalable vector extension on stencil codes

    Journal of Supercomputing, Vol. 76, Núm. 3, pp. 2039-2062

2019

  1. Early visibility resolution for removing ineffectual computations in the graphics pipeline

    Proceedings - 25th IEEE International Symposium on High Performance Computer Architecture, HPCA 2019

  2. Poster: An optimized predication execution for simd extensions

    Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT

  3. Rendering elimination: Early discard of redundant tiles in the graphics pipeline

    Proceedings - 25th IEEE International Symposium on High Performance Computer Architecture, HPCA 2019

2018

  1. Performance and energy effects on task-based parallelized applications: User-directed versus manual vectorization

    Journal of Supercomputing, Vol. 74, Núm. 6, pp. 2627-2637

2016

  1. MASkIt: Soft Error Rate Estimation for Combinational Circuits

    PROCEEDINGS OF THE 34TH IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN (ICCD)

  2. MASkIt: Soft error rate estimation for combinational circuits

    Proceedings of the 34th IEEE International Conference on Computer Design, ICCD 2016

2015

  1. DiMP: Architectural support for direct message passing on shared memory multi-cores

    Proceedings of the International Conference on Parallel Processing

  2. ICCI: In-cache coherence information

    IEEE Transactions on Computers, Vol. 64, Núm. 4, pp. 995-1014