Energy-efficient design for highly associative instruction caches in next-generation embedded processors

  1. Aragon, JL
  2. Nicolaescu, D
  3. Veidenbaum, A
  4. Badulescu, AM
Buch:
DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, VOLS 1 AND 2, PROCEEDINGS
  1. Gielen, G (coord.)
  2. Figueras, J (coord.)

ISBN: 0-7695-2085-5

Datum der Publikation: 2004

Seiten: 1374-1375

Kongress: Design, Automation and Test in Europe Conference and Exhibition (DATE 04)

Art: Konferenz-Beitrag

DOI: 10.1109/DATE.2004.1269095 GOOGLE SCHOLAR
Fuente de los datos: WoS