Techniques to improve performance in requester-wins Hardware Transactional Memory

  1. Armejach, A.
  2. Titos-Gil, R.
  3. Negi, A.
  4. Unsal, O.S.
  5. Cristal, A.
Revue:
Transactions on Architecture and Code Optimization

ISSN: 1544-3566,  1544-3973

Année de publication: 2013

Volumen: 10

Número: 4

Type: Article

DOI: 10.1145/2555289.2555299 GOOGLE SCHOLAR lock_openAccès ouvert editor
La source de données: Scopus