Optimizing CAM-based instruction cache designs for low-power embedded systems

  1. Aragón, J.L.
  2. Veidenbaum, A.V.
Revue:
Journal of Systems Architecture

ISSN: 1383-7621

Année de publication: 2008

Volumen: 54

Número: 12

Pages: 1155-1163

Type: Article

DOI: 10.1016/J.SYSARC.2008.06.001 GOOGLE SCHOLAR