An architecture for high-performance scalable shared-memory multiprocessors exploiting on-chip integration

  1. Acacio, M.E.
  2. González, J.
  3. García, J.M.
  4. Duato, J.
Revue:
IEEE Transactions on Parallel and Distributed Systems

ISSN: 1045-9219

Année de publication: 2004

Volumen: 15

Número: 8

Pages: 755-768

Type: Article

DOI: 10.1109/TPDS.2004.27 GOOGLE SCHOLAR
La source de données: Scopus